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SA56
MICROTECHNOLOGY
FEATURES
* * * * * DELIVERS UP TO 5A CONTINUOUS OUTPUT OPERATES AT SUPPLY VOLTAGES UP TO 60V NO "SHOOT-THROUGH" CURRENT THERMAL SHUTDOWN (OUTPUTS OFF) AT 160C SHORTED LOAD PROTECTION (to VS or PGND or SHORTED LOAD) * NO BOOTSTRAP CAPACITORS REQUIRED * PROGRAMMABLE ONBOARD PWM
APPLICATIONS
* * * * * DC BRUSH-TYPE MOTOR DRIVES POSITION AND VELOCITY SERVOMECHANISMS FACTORY AUTOMATION ROBOTS NUMERICALLY CONTROLLED MACHINERY COMPUTER PRINTERS AND PLOTTERS
23 PIN SIP PACkAGE STYLE EX DESCRIPTION
The SA56 is a 5-ampere PWM Amplifier designed for motion control applications. The device is built using a multi-technology process that combines bipolar and CMOS control circuitry with DMOS power devices in a single monolithic structure. Ideal for driving DC and stepper motors, the SA56 accommodates peak output currents up to 10 amperes. An innovative circuit that facilitates low-loss sensing of the output current has been implemented. An on-board PWM oscillator and comparator are used to convert an analog signal into PWM direction of rotation and magnitude for motor control applications. TTL or CMOS digital inputs allow direct external control in 2-quadrant or 4-quadrant modes.
FIGURE 1. BLOCK DIAGRAM
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SA56
ABSOLUTE MAXIMUM RATINGS
SUPPLY VOLTAGE, VDD SUPPLY VOLTAGE, VS PEAK OUTPUT CURRENT (100mS) CONTINUOUS OUTPUT CURRENT POWER DISSIPATION POWER DISSIPATION (TA = 25C, Free Air) JUNCTION TEMPERATURE, TJ(MAX) ESD SUSCEPTIBILITY (Logic Pins Only) STORAGE TEMPERATURE, TSTG LEAD TEMPERATURE (Soldering, 10 sec.) JUNCTION TEMPERATURE, TJ
ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS
5.5V 60V 10A 5A 125W 10W 150C 1500V -40C to +150C 300C -40C to +150C
SPECIFICATIONS
PARAMETER VS VDD SWITCH ON RESISTANCE, RDS(ON) N-Channel SWITCH ON RESISTANCE, RDS(ON) P-Channel CLAMP DIODE FORWARD DROP, VCLAMP LOGIC LOW INPUT VOLTAGE, VIL LOGIC LOW INPUT CURRENT, IIL LOGIC HIGH INPUT VOLTAGE, VIH LOGIC HIGH INPUT CURRENT, IIH CURRENT SENSE OUTPUT CURRENT SENSE LINEARITY ERROR TEST CONDITIONS MIN 12 4.5 TYP MAX 60 5.5 0.6 0.6 0.8 +10 VDD 240 1.0 1 10 300 1.32 5 8 8 50 15 UNITS V V V V A V A A mA % % % C mA mA ns ns ns ns ns V mA V ns
Output Current = 5A Output Current = 5A Clamp Current = 5A VIN = -0.1V VIN = 5.5V IOUT = 1A IOUT = 5A 1A IOUT 5A 100 mA IOUT 5A 5A IOUT 10A (Peak Currents only) Outputs Turn OFF No Load, FSW = 100kHz 50% DUC No Load, FSW = 100kHz 50% DUC No Load No Load No Load No Load No Load IREF = 1mA Source Only, No current sink capability Load Current = 400A Output shorted (No bypass capacitor at SCin pin) Full Temperature Range Full Temperature Range
0.23 0.27
-0.5 -10 2 -10 180 .79
1.43
SHUTDOWN TEMPERATURE, TJSD QUIESCENT SUPPLY CURRENT, IS QUIESCENT SUPPLY CURRENT, IDD OUTPUT TURN-ON DELAY TIME, tDon OUTPUT TURN-ON SWITCHING TIME, ton OUTPUT TURN-OFF DELAY TIMES, tDoff OUTPUT TURN-OFF SWITCHING TIME, toff MINIMUM INPUT PULSE WIDTH, tp (DIGITAL MODE) REFERENCE VOLTAGE Vref OUTPUT CURRENT (Vref 2.5V), IREF ANALOG INPUT RANGE FOR FULL MODULATION HIGH CURRENT SHUTDOWN RESPONSE THERMAL RESISTANCE, Junction to Case RESISTANCE, Junction to Air TEMPERATURE RANGE, Case
160 26 6 200 41 272 46 140 2.3 2.5
2.7 1
1 250
4 800
1 12.21 -40 125
C/W C/W C
NOTE: These specifications apply for VS = 50V and VDD = 5V at 25C, unless otherwise specified.
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TYPICAL PERFORMANCE GRAPHS
SA56
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SA56
0.5 0.45 0.4 0.35 0.3 0.25 0.2 RDSON = -25C RDSON = 0C RDSON = 50C 0.15 RDSON = 85C 0.1 0.05 0 0 1 2 3 4 5 C
TYPICAL PERFORMANCE GRAPHS
RDSON = 125C
C
C
C
C
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OPERATING CONSIDERATIONS
SA56
be logic low. When a junction temperature exceeds approximately 160C this pin will change to logic high and the output will be latched off. Grounding this pin disables over temperature protection. This pin should be left open if over temperature protection is desired but the flag is not used. Current Sense output and programmable 8 ISEN current limit. A current proportional to the output current is sourced by this pin. Typically this pin is connected to a resistor for programmable current limit or transconductance operation. Ground connection for all internal digital and 9,10 SIGGND low-current analog circuitry. 11 FAULT This pin latches high whenever the four MOSFETs have been placed in the tristate condition which occurs when either the high-current or the thermal protection has engaged. An external timing capacitor is connected to 12 CPWM this pin to set the frequency of the internal oscillator and ramp generator for analog control mode. The capacitor value (pF) = 4.05x107/FSW, where FSW = the desired switching frequency. This pin is grounded for digital control mode. 5V supply for input logic and low voltage 13,14 VDD analog circuitry. Reference voltage. Can be used at low cur15 VREF rent for biasing analog loop circuits. 16 DIR Direction of rotation control; In 2 quadrant, digital control, determines the active output FETs. This pin should be grounded in analog control mode. 17 PWM CMOS/TTL input for digital PWM control, or 1-4V analog input for duty cycle control in analog control mode. 18 DISABLE Following a fault, pulling the DISABLE pin HIGH and then LOW will reset a latched fault condition. (When pulled HIGH, all four output MOSFETs are disabled. A logic LOW on this pin allows the four output FETs to function normally.) When the DISABLE and FAULT pins are tied to a microcontroller, the FAULT pin will generate an interrupt in the microcontroller, so that the interrupt, can in turn, generate a pulse on the DISABLE pin. When a fault occurs, the SA56 fault circuitry will be reset. Half bridge output A 21,22 AOUT
GENERAL
Please read "SA56 Design Ideas" that covers the various SA56 applications in considerable detail. Also see Application Note 1 "General Operating Considerations" which covers stability, power supplies, heat sinking, mounting, and specification interpretation. Visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, Apex's complete Application Notes library, Technical Seminar Workbook and Evaluation Kits.
GROUND PINS
The two SIGGND pins, 9 & 10, are for input signal grounds. Pins 1 and 23, PGND, are power grounds. The PGND & SIGGND pins are connected at one point inside the IC. It is also recommended the user connect both pins at a single point on the board in a way that no current flows through that connection.
POWER SUPPLY BYPASSING
Bypass capacitors to power supply terminals VS and VDD must be connected physically close to the pins to prevent erratic, low-efficiency operation and excessive ringing at the outputs. Electrolytic capacitors, at least 10 F per output ampere are required for suppressing VS to PGND noise. High quality ceramic capacitors (X7R) 1 F or greater should also be used. Only capacitors rated for switching applications should be considered. The bypass capacitors must be located as close to the power supply pins as possible. Due to the very fast switching times of the outputs, the inductance of 1 inch of circuit trace could cause noticeable degradation in performance. The bypassing requirements of VDD are less stringent, but still necessary. A 0.1 F to 0.47 F capacitor connected directly between the VDD and SIGGND pins will suffice.
PIN DESCRIPTIONS
Pin # Name 1,23 PGND 2,3 BOUT 4,5, VS 19,20 6 SC Description Power high current ground return path of the motor. Half bridge output B High voltage supply The short-circuit protection circuits will sense a direct short from either output (AOUT or BOUT) to PGND or VS - as well as across the load. If the high-current protection circuit engages it will place all four MOSFETs in the tristate state (high-impedance output). The SC output, pin 6, will go HIGH though not latch, thereby denoting that this protection feature has been triggered. Temperature limit, CMOS. This pin can be used as a flag for an over-temperature condition. Under normal operation this pin will
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TLIM
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SA56
MODES OF OPERATION
The following chart shows the 3 modes of operation. Mode 2 Quadrant - Analog Mode CPWM pin 12 Connect capacitor to set frequency PWM pin 17 Analog control voltage (1 - 4V) DIR pin 16 Low (SIGGND) AOUT pins 21, 23 Control voltage greater than VREF: (AOUT - BOUT)< 0 average voltage High (VS) PWM DIR
OPERATING CONSIDERATIONS
BOUT pins 2, 3 Control voltage greater than VREF: (BOUT - AOUT)> 0 average voltage PWM High (VS) DIR
2 Quadrant - Digital Mode 4 Quadrant - Digital Mode
SIGGND SIGGND SIGGND
Modulation In Modulation In High (VDD)
High (VDD) Low (SIGGND) Modulated In
4-QUADRANT - ANALOG MODE
The SA56 can operate in 4-quadrant mode with analog or digital inputs. In the analog mode, the capacitor from CPWM to SIGGND sets the frequency of an internal triangular ramp signal. See Figure 2. An analog voltage applied to the PWM pin is compared to a 2.5 volt reference within the SA56 thereby governing the duty cycle of the output. Note that the analog pin DIR pin 16 is connected to signal ground (SIGGND).
2-QUADRANT - DIGITAL MODE
Two-quadrant operation of the FETs is realized by driving PWM pin 17 of the SA56 with a digital PWM signal supplied by a microcontroller or DSP, as depicted in Figure 3. When using a digital modulation signal, connect the CPWM pin to SIGGND to disable the internal oscillator and its companion ramp generator. A digital PWM signal applied to the PWM pin controls the output duty cycle at one output pin while the other output pin is held "HIGH". The input at the DIR pin (VDD or SIGGND) governs the output behavior. If DIR is a logic HIGH, the AOUT output will be held high and the BOUT output will be switched as the complement of the PWM input signal. The average output at AOUT will always be greater than at BOUT. Whereas if DIR is a logic LOW, the BOUT output will be held "HIGH" and the AOUT output will be switched. Operating in two-quadrant mode reduces switching noise and power dissipation, but limits the ability to control the motor at very low speed.
OPERATING WITH DIGITAL INPUTS
Two and 4-quadrant operation are possible with the SA56 when driven with a digital PWM signal from a microcontroller or DSP. When using a digital modulation signal, tie the CPWM pin to SIGGND to disable the internal oscillator and ramp generator. When operating in the digital mode, pulse widths should be no less than 100 ns and the switching frequency should remain less than 500 kHz. This will allow enough time for the output MOSFETs to reach their full on and off states before receiving a command to reverse state.
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OPERATING CONSIDERATIONS
SA56
Short-circuit protection - The short-circuit protection circuits will sense a direct short from either output (AOUT or BOUT) to PGND or VS - as well as across the load. If the high-current protection circuit engages, it will place all four MOSFETs in the tristate state (high-impedance output). The SC output, pin 6, will go HIGH though not latch, thereby denoting that this protection feature has been triggered. Over-current protection - When the current on the high side goes above 10 amperes peak, the over-current circuit tristates so that the four MOSFETs go into a latched fault condition. Thermal protection - The thermal protection circuits will engage if the temperature of any of the four MOSFETs reaches approximately 160C. If this occurs, the FAULT output pin will go HIGH. If the thermal protection circuit engages, it will place all four MOSFETs in the tristate state (high-impedance output). The TLIM output which is normally LOW will go HIGH, though not latch, thereby denoting which of the protection features has been triggered.
4 QUADRANT DIGITAL MODE
During four-quadrant operation a single digital PWM input includes magnitude and direction information. The digital PWM input signal is applied to the DIR pin, as shown in Figure 4, and the PWM pin is tied HIGH to VDD. Both pairs of output MOSFETs will switch in a locked, complementary fashion. With a 50% duty cycle the average voltage of outputs AOUT and BOUT will be the same, which is half of VS so that the average differential voltage over each period applied to the load will therefore be zero. Four-quadrant operation allows for smooth transitions through zero current for low-speed applications. However, power dissipation is slightly higher than in two-quadrant operation since all four output MOSFETs must switch every cycle.
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PROGRAMMABLE CURRENT LIMIT
The ISEN pin sources a current proportional to the forward output current of the active P channel output MOSFET. The proportionality is approximately 200 microamperes per ampere of output current. Note that the ISEN output is blocked during the switching transitions when current spikes are likely to be significant. To create a programmable current limit, connect a resistor from ISEN to SIGGND. If the voltage across this resistor exceeds an internally-generated 2.75V threshold, all four output MOSFETs will be turned off for the remainder of the switching cycle. A 2.7k-Ohm resistor will set the current limit at approximately 5 amperes. The ISEN output can also be used for maintaining a current control loop in torque motor applications.
BRAkING - DIGITAL MODE
Under digital control, the SA56 can rapidly decelerate the motor by shunting the winding currents through the output MOSFETs. Logic LOW on the PWM input both A and B outputs high. The motor winding current circulates through the on resistance of the MOSFETs quickly slowing the motor. The winding current can be monitored with the ISEN pin during the braking of the motor. However, the current during braking circulates in the normal forward direction through one output MOSFET and is in the reverse in the other MOSFET. The current sense feature can measure only forward currents. The logic input on the DIR pin dictates which output MOSFET is used for sensing the forward current during braking.
CURRENT SENSE LINEARITY CALCULATION
The current sense linearity is specified in the table on page 2 and is calculated using the method described below: a) Define a straight line (y = mx + b) joining the two end data points where, m is the slope and b is the offset or zero crossover. Calculate the slope m and offset c using the extreme data points. Assume ISENSE in the y axis and ILOAD in the x axis. b) Calculate linear ISEN (or ideal ISENSE value, ISIDEAL) using the straight line equation derived in step (a) for the ILOAD data points. c) Determine deviation from linear ISEN (step (b) and actual measured ISENSE value (ISACTUAL) as shown below:
PROTECTION CIRCUITS
The most severe condition for any power device is a direct, hard-wired ("screwdriver") short from an output to ground. While the short-circuit protection will latch the output MOSFETs within 500 ns (typical), the die and package may be required to dissipate up to 500 Watts of power until the protection circuits are activated. This energy can be destructive, particularly at higher operating voltages, so sound thermal design is critical if fault tolerance is to be established in the design. The VS and PGND pins may become very hot during this period of high current. Thermal and short-circuit protection are included in the SA56 to prevent damage in the event that faults occur as described below:
APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 * FAX (520) 888-3329 * inaccuracies or omissions. All specifications are subject to change without notice. This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com
SA56U REV A FEBRUARY 2007 (c) 2007 Apex Microtechnology Corp.
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